1. Field
Embodiments described herein relate generally to a semiconductor storage device.
2. Description of the Related Art
Resistive memory devices that use variable resistance elements as storage elements have attracted increased attention as a likely candidate for replacing flash memory. As described herein, it is assumed that the resistive memory devices include Resistive RAM (ReRAM) in a narrow sense that uses a transition metal oxide as a recording layer and stores its resistance states in a non-volatile manner, as well as Phase Change RAM (PCRAM) that uses chalcogenide or the like as a recording layer to utilize the resistance information of crystalline states (conductors) and amorphous states (insulators), and so on.
It is known that the memory cells in resistive memory devices have two modes of operation. One is to set a high resistance state and a low resistance state by switching the polarity of the applied voltage, which is referred to as “bipolar type”. The other enables the setting of a high resistance state and a low resistance state by controlling the voltage values and the voltage application time, without switching the polarity of the applied voltage, which is referred to as “unipolar type”.
For unipolar-type ReRAM, as an example, data is written to a memory cell by applying a certain voltage to a variable resistance element for a short period of time. As a result, the variable resistance element changes from a high resistance state to a low resistance state. The operation of changing a variable resistance element from a high resistance state to a low resistance state is hereinafter referred to as the “set operation”. On the other hand, data is erased from a memory cell MC by applying a certain voltage for a long period of time that is lower than the voltage applied in the set operation to a variable resistance element in its low resistance state after the set operation. As a result, the variable resistance element changes from a low resistance state to a high resistance state. The operation of changing a variable resistance element from a low resistance state to a high resistance state is hereinafter referred to as the “reset operation”. For example, a memory cell takes a high resistance state as a stable state (reset state), and, for binary storage, data is written to the memory cell by a set operation that causes a reset state to be switched to a low resistance state.
When an operation is performed on a resistive memory device, such a voltage is generated by a boost circuit provided on a semiconductor substrate that is required for changing the state of a relevant memory cell. The boost circuit may include a plurality of charge pumps provided in a distributed manner on the semiconductor substrate. In outputting a high voltage required for a variable resistance element to transition between resistance states, concurrent operation of multiple charge pumps included in the boost circuit leads to a very large instantaneous increase (jitter) in the boosted voltage. This large jitter causes variations in voltage used in operation, which may result in erroneous write or breakdown of memory cells.